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ADCLK925

2.5V to 3.3V, 2 Outputs, Ultrafast SiGe ECL Clock/Data Buffers

ADCLK925VREFVTD~{D}VCCVCCVEEVEEEPQ1~{Q1}Q2~{Q2}NCNCNCNC

Pin Configuration (17 pins)

PinNameType
15VREFoutput
16VTinput
1Dinput
2~{D}input
8VCCpower_in
13VCCpower_in
7VEEpower_in
14VEEpower_in
17EPpower_in
12Q1output
11~{Q1}output
10Q2output
9~{Q2}output
3NCpassive
4NCpassive
5NCpassive
6NCpassive

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Details

Librarycern-symbols
Pin Count17