CDC3RL02

Low Phase-Noise Two-Channel Clock Fan-Out Buffer

Pin Configuration (8 pins)

Pin	Name	Type
A1	VBATT	input
C1	MCLK_IN	input
D1	GND	power_in
B1	VLDO	output
A2	CLK_OUT1	output
B2	CLK_REQ1	input
D2	CLK_OUT2	output
C2	CLK_REQ2	input

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