LMK01000

1.6 GHz High Performance Clock Buffer, Divider, and Distributor

Pin Configuration (49 pins)

Pin	Name	Type
27	SYNC	input
36	BIAS	input
6	LEuWire	input
4	CLKuWire	input
5	DATAuWire	input
28	CLKin0	input
29	~{CLKin0}	input
34	CLKin1	input
35	~{CLKin1}	input
11	GOE	input
12	Test	output
3	VCC	power_in
8	VCC	power_in
13	VCC	power_in
16	VCC	power_in
19	VCC	power_in
22	VCC	power_in
26	VCC	power_in
30	VCC	power_in
31	VCC	power_in
33	VCC	power_in
37	VCC	power_in
43	VCC	power_in
40	VCC	power_in
46	VCC	power_in
14	CLKout0	output
15	~{CLKout0}	output
17	CLKout1	output
18	~{CLKout1}	output
20	CLKout2	output
21	~{CLKout2}	output
23	CLKout3	output
24	~{CLKout3}	output
38	CLKout4	output
39	~{CLKout4}	output
41	CLKout5	output
42	~{CLKout5}	output
44	CLKout6	output
45	~{CLKout6}	output
47	CLKout7	output
48	~{CLKout7}	output
2	NC	passive
7	NC	passive
9	NC	passive
10	NC	passive
32	NC	passive
1	GND	power_in
25	GND	power_in
49	EP	passive

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