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NB4N527SMN

3.3V, 2.5Gb/s Dual Any Level to LVDS Receiver/Driver/Buffer/Translator With Internal Input Termination

NB4N527SMNEPVCCGNDVTD0D0~{D0}~{VTD0}NCQ0~{Q0}VTD1D1~{D1}~{VTD1}NCQ1~{Q1}

Pin Configuration (17 pins)

PinNameType
17EPpower_in
8VCCpower_in
5GNDpower_in
13VTD0input
14D0input
15~{D0}input
16~{VTD0}input
6NCpassive
12Q0output
11~{Q0}output
1VTD1input
2D1input
3~{D1}input
4~{VTD1}input
7NCpassive
10Q1output
9~{Q1}output

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Details

Librarycern-symbols
Pin Count17