2-A Peak Sink / Source DDR Termination Regulator With VTTREF Buffered Reference for DDR2, DDR3 and DDR3L
| Pin | Name | Type |
|---|---|---|
| 1 | VDDQSNS | input |
| 2 | VLDOIN | input |
| 7 | S3 | input |
| 9 | S5 | input |
| 10 | VDD | power_in |
| 3 | VTT | power_in |
| 5 | VTTSNS | input |
| 4 | PGND | power_in |
| 6 | VTTREF | output |
| 8 | GND | power_in |
| 11 | EP | power_in |
